The RISC-V Virtual Machine (riscv-vm) is intended for anyone wanting to study, configure as-preferred, modify, implement or release hardware based the RISC-V Instruction Set Architecture.
The source files on this repository are intended to enable anyone to configure a riscv_vm on their preferred virtualisation platform. The initial riscv_vm was developed and tested on Oracle's VirtualBox 6.0.10 but not on other virtualisation SW. This initial version was tagged as the "beta" release of the VM, with plans to fix the source files to address issues raised by the community.
As of Sept 10, 2019, the riscv_vm includes most of the SW described in the https://open-isa.org/get-started/ webpage, except including NXP's VEGA board SDK and the Verilator simulator. It is intended for use during the https://osdforum.org/ Sept. 18/ 2019 event.