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IEEE Open Source Maintainers Manual

This project houses the (to be confirmed) IEEE Standards Association Proposed PAR (Project Authorization Request) entitled:

Re-Use Library Abstraction (RULA) as a means to accelerate library adoption by decreasing library learning uptake time.

The Open Source Community Advisory Group (OSCAG) defines and promotes best practices for participation in open source projects, especially within the IEEE SA Open framework. We invite everyone with an interest in free software and open source software, data, or re

All things related to IEEE 11073 Nomenclature for Medical Device Communication

DocuBricks is a modular (XML-based) documentation language for Open Source Hardware projects. It is particularly suitable for multi-fabrication method and academic products and supports illustrated assembly instructions for non-experts.

Meeting information, tasks, deliverables and supporting documentation for the Academic Use Subgroup are stored here.

The API client to talk to the open credential publisher. Intended as a pluggable module to add to an existing application.

A module to take incoming transcript data and extract a JSON CLR. Originally designed to fit North Dakota education data but modeled to fit the CLR standard as it develops.

Planning and road mapping of the Support & Safety team, including people (volunteers, staff, etc), roles, as well as projects (documentation, help desk, etc).

A place for testing and exploring GitLab features and discussing the setup of this GitLab instance

IEEE SA Open Infrastructure

Where you may submit questions and issues to staff. Most issues should be asked of the community first but in regards to hosting and platform issues, this is the place. Please always check the FAQ first.

Start here - Includes all OSVVM Utility and Verification Component libraries as submodules.

OSVVM utility library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement.