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Unverified Commit 96e3c0b1 authored by Alfredo's avatar Alfredo Committed by GitHub
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parent 9231514c
# riscv_vm
&nbsp;<img src="" width="200" title="RISC-V VM">
The OpenHW Group's RISC-V Virtual Machine (riscv_vm) is intended for anyone wanting to study, configure as-preferred, modify, implement or release hardware based the RISC-V Instruction Set Architecture. The VM is preconfigured for RISC-V HW development.
* RISC-V SW tool chain using the Eclipse-IDE
* RISC-V Imperas OVPSim model
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