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Unverified Commit 78fdc868 authored by Alfredo's avatar Alfredo Committed by GitHub
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Update README.md

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# riscv_vm
The OpenHW Group's RISC-V Virtual Machine (riscv_vm) is intended for anyone wanting to study, configure as-preferred, modify, physically-implement or sell hardware based the RISC-V Instruction Set Architecture. The VM is preconfigured for RISC-V HW development.
The OpenHW Group's RISC-V Virtual Machine (riscv_vm) is intended for anyone wanting to study, configure as-preferred, modify, implement or release hardware based the RISC-V Instruction Set Architecture. The VM is preconfigured for RISC-V HW development.
* RISC-V SW tool chain using the Eclipse-IDE
* RISC-V Imperas OVPSim model
* RISC-V Verilator model
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